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000-085 - System x BladeCenter Technical Support V5 - Dump Information

Vendor : IBM
Exam Code : 000-085
Exam Name : System x BladeCenter Technical Support V5
Questions and Answers : 45 Q & A
Updated On : February 15, 2019
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000-085 Questions and Answers

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000-085 System x BladeCenter Technical Support V5

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000-085 exam Dumps Source : System x BladeCenter Technical Support V5

Test Code : 000-085
Test Name : System x BladeCenter Technical Support V5
Vendor Name : IBM
Q&A : 45 Real Questions

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IBM System x BladeCenter Technical

IBM device X, BladeCenter server business up for grabs | killexams.com Real Questions and Pass4sure dumps

IBM has shopped around its Intel-primarily based system X and BladeCenter server enterprise to a number of capabilities patrons the past few months, although the enterprise has had the most huge talks with Lenovo, in accordance with sources time-honored with the talks.

IBM's on-once again-off-once again negotiations with Lenovo are now again on despite the fact both events continue to be "some distance apart on price" and it may take a long time to attain an agreement, in accordance with sources. Lenovo additionally purchased huge Blue's notebook business nearly 10 years in the past.

Lenovo could be a sensible choice by means of IBM, some analysts agree with, given the prior relationship between both agencies. One analyst reserved judgment however, asserting she would ought to see the particulars once the deal is signed.

"we'd want to see what form the ongoing relationship between both would take. With so many functions and application delivered on the x86 platform across the whole server market, i would consider Lenovo would need some type of favored nation status with IBM for it to work for each events," pointed out Jean Bozman, analysis vice president with IDC Corp., a expertise analysis company based mostly in Framingham, Mass. "or not it's a troublesome proposition being in that x86 business."

whereas IBM has yet to at once ascertain efforts to sell its sequence X line of x86 servers, all over a convention call final week reporting its 2d quarter financials, IBM Chief financial Officer Mark Loughridge vaguely said a "big divestiture" it expected to make via the conclusion of this year, that might likely be delay until next 12 months. Loughridge declined to identify the enterprise IBM may promote, asserting only that the enterprise would not force one of these deal for the sake of beating some 12 months-conclusion time limit.

all the way through that call ultimate week, IBM mentioned that its revenues from its system X company were down eleven% within the 2d quarter compared to the equal quarter final 12 months. Even worse, revenues from its power methods enterprise dove 25% in the quarter compared to the equal quarter ultimate 12 months.

The handiest brilliant spot for IBM's server hardware enterprise changed into its device Z mainframe business, which grew 10% within the quarter. possibly more importantly, the start of device Z computing vigour, often known as MIPS (hundreds of thousands of directions per second) leaped 23%.

despite the efficiency of the vigour programs business this year, IBM isn't due to the fact selling off any pieces of it. The profit margins on those systems are tons larger than on system X, and they additionally present extra opportunity for IBM to introduce technical improvements.

"You cannot innovate on [the System X] platform for very lengthy before Intel just sucks every thing into the chip, it's a pure commodity play," mentioned one supply close to IBM. "Given the earnings margins, it doesn't make feel to retain pumping money into x86 servers simply to run SAP instance faster. No thanks."

IDC's Bozman disagrees, noting that IBM has a extremely large range of capabilities and utility it could pull together from across its many application and features divisions that can be delivered for x86-based mostly servers.

"IBM is a company that's 50% functions and 20% to 25% utility, with things like analytics, large data and cloud they might innovate across the x86 platform, no matter if these solutions are built by using them or a person else," Bozman spoke of.

Some observers agree with the deal would benefit each events since it plays to their respective strengths.

"[IBM doesn't] have the cost structure nor the abdominal to play in this kind of fiercely aggressive house. and they do not need the workstation business you need to power the volumes you should get competitive component pricing," said Andrew Feldman, conventional supervisor and company vice chairman of AMD's Server company Unit. "This could become a very successful movement for either side."


Citrix XenServer certified on IBM system x and BladeCenter Servers | killexams.com Real Questions and Pass4sure dumps

Citrix methods, Inc. these days announced that IBM has certified Citrix XenServer® on gadget x and BladeCenter Servers to make deployment quicker and more convenient for customers. The rigorously pre-proven configurations enable purchasers to greater without problems leverage Citrix XenServer and IBM servers to automate datacenter management techniques and boost effectivity of datacenter infrastructures.

these days’s announcement expands the turning out to be market momentum for XenServer in each cloud and enterprise datacenters. more than 50,000 companies worldwide now install XenServer for server virtualization, together with 50 % of the Fortune 500. XenServer also continues to gain share amongst cloud providers, building on the presence of the open supply Xen hypervisor, the most widely deployed virtualization platform within the cloud. it's also probably the most accepted hypervisor for digital computers, hosting an estimated 2.5 million VDI-primarily based pcs.

IBM has a confirmed music list of customer success with Citrix-based mostly options operating on IBM system x and BladeCenter servers. For clients deploying the pre-qualified configurations, IBM provides server hardware assurance support, while Citrix offers procurement and software guide. To entry the pre-certified configurations, and locate extra details on the tests conducted, please consult with the IBM and XenServer web page. furthermore, the IBM device x and BladeCenter servers are featured on the Citrix Hardware Compatibility listing.


IBM units performance records with new eX5 servers | killexams.com Real Questions and Pass4sure dumps

IBM these days delivered new methods that are optimized for client workloads. the new x86-based mostly servers lengthen the market-leading capabilities of its equipment x portfolio and raise the boundaries on commercial enterprise workloads, reminiscence and scaling. the new blade and rack servers count on IBM’s exclusive X-structure expertise to present shoppers advanced computing structures designed to wring maximum performance from the brand new Intel Xeon processor E7 family.

the brand new device x 3850 X5 server, as an example, has already claimed the maximum influence achieved to date by a non-clustered server on the TPC-H 1000GB benchmark, beating HP’s optimum results for efficiency and cost/performance by way of 24% and 52% respectively. The x3850 X5 has also completed a world-listing 4-processor influence on two-tier SAP SD usual utility benchmark -- 14,000 SAP SD users. The benchmarks demonstrate the management performance it's viable with the vigour of IBM’s fifth-era X-architecture know-how (eX5).

IBM additionally announced nowadays the IBM methods solution for SAP In-memory appliance, SAP HANA. certified by SAP, the techniques permit SAP analytics of SAP ERP records on the fly with confirmed capabilities of processing 10,000 queries per hour towards 1.3TB of information. IBM and SAP have cooperated closely to implement the advanced replication state of affairs for DB2-primarily based purchasers. DB2 is SAP HANA-able and may correctly replicate facts into SAP HANA in close real time the use of the Sybase Replication Server. purchasers with ERP methods on DB2 can for this reason seamlessly aid worrying enterprise wants for true-time reporting in response to the newest available data with unmatched administrative effort.

“the new system x servers are designed for records and will assist keep IBM shoppers ahead of the curve when it comes to getting ready for a new era of functions,” talked about Adalio Sanchez, everyday manager, IBM system x. “With our innovation management we're supplying programs optimized for big data; methods that installation extended memory, for instance, to permit businesses to now not best deal with new streams of information, however to assist convert them into new income streams.”

Highlights of recent 2011 system x and BladeCenter eX5 programs

New system x3950 X5, x3850 X5, x3690 X5, and BladeCenter HX5 fashions

New enhancements consist of:

• 2X boost in memory ability across the whole eX5 product line, up to 6TB in total.

• up to 40% CPU efficiency growth over previous technology Intel Xeon 7500 series.

• up to 1000X efficiency increase and 4X extra internal SSD storage capability with new 50GB and 200GB drives for eXFlash.

• the new two-socket x3690 X5 server pushes the limits of virtualization with the means to set up the maximum number of virtual machines supported by way of VMware.

• the brand new eX5-powered BladeCenter HX5, features as much as forty processor cores, tuned for records-intensive workloads.

MAX5 memory growth

The MAX5 reminiscence expansion drawer offers extra DIMM slots for each and every eX5 server—without the need for paying for additional processors and application licenses.

New MAX5 growth capabilities consist of:

• Eight-socket x3850 X5: as much as 192 DIMM slots (6 TB)

• 4-socket x3850 X5: as much as 96 DIMM slots (3 TB)

• Two-socket x3690 X5: as much as sixty four DIMM slots (2 TB)

• Two-socket HX5: as much as 32 DIMM slots (512 GB)

eXFlash solid State Storage know-how

IBM eXFlash strong-state power know-how has been up to date with new 50 GB and 200 GB solid state drives. New eXFlash know-how can achieve 2,a hundred% greater I/O transactions per second and 9X faster response time when in comparison to normal difficult drives.

FlexNode Partitioning and Failover

FlexNode know-how, introduced in 2010, has now been extended to the eight-socket x3850 X5 with MAX5. FlexNode offers failover and portioning flexibility, giving these techniques the skill to dynamically unite and separate twin node HX5 or x3850 X5 with MAX5 programs according to company wants.

explore further: New IBM device Is First to process 1 Million Transactions per Minute


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IBM cuts bait on Intel server line, Lenovo bites | killexams.com real questions and Pass4sure dumps

Just days after reporting dismal server hardware sales, IBM has unloaded its lower-end Intel-based System X servers to Lenovo for $2.3 billion.

Reports of this deal began to circulate last July with speculation mounting in recent weeks following the company's launch of its X6 architecture for its System X and Power servers, which industry watchers saw as an attempt to make its Intel Corp. servers more attractive to potential buyers.

Some analysts believe the deal makes strategic sense for Lenovo, IBM and the respective users of each company.

"Lenovo will be invested in growing the business, users consequently will get lower price points and a clearer and more defined product roadmap," said Krista Macomber, hardware analyst with Technology Business Research, Inc., market researchers in Hampton, N.H. "But they will also get the service and support they are used to getting from IBM."

The deal should open up new market opportunities for the System X line and IBM's higher-end Power series as well, according to Macomber. With the System X line gone, the Power series can pursue new market opportunities without "stepping on the toes" of System X, Macomber said.

Initially, some users may be unhappy with the deal and could jump ship.

"There could be some dissent among the more diehard System X customers over the next year or so who could be concerned about support, but overall the defections will be relatively light," Macomber said.

Besides the System X servers, other IBM server products in the acquisition include the company's BladeCenter and Flex System blade servers and switches, x86-based Flex integrated systems, NeXtScale and iDataPlex servers, and the blade networking and maintenance operations, according to a company spokesman.

IBM will retain its System z mainframes and Power Systems, both of which had disappointing sales results for 2013, along with its Storage Systems, Power-based Flex servers, and PureApplication and PureData appliances, according to the company.

As part of the deal IBM and Lenovo will form a partnership that involves a worldwide OEM and reseller agreement for a range of IBM products including Big Blue's Storwize disk storage systems.

"This divestiture allows IBM to focus on system and software innovations including cognitive computing, big data and cloud," said Steve Mills, IBM's senior vice president and group executive, IBM Software and Systems, in a prepared statement.

Earlier this week IBM reported overall server hardware sales for the fourth quarter plummeted 26%, with the System X series dropping 16%.

For its part of the deal, Lenovo will assume all related customer service and maintenance operations for System X products. IBM will provide maintenance delivery on Lenovo's behalf for an undisclosed period of time, according to a company spokesman.

The deal builds on the collaboration between the two companies, which began in 2005 when Lenovo bought IBM's desktop PC business, including the ThinkPad laptops.

Under the terms of the deal Lenovo will fork over $2 billion in cash with the remainder in stock. A company spokesman said some 7,500 IBM workers will be offered positions at Lenovo.


When Databases Meet FPGA: Achieving 1 Million TPS With X-DB Heterogeneous Computing | killexams.com real questions and Pass4sure dumps

X-Engine is a new generation storage engine developed by Alibaba Database Department and is the basis of the distributed database X-DB. To achieve 10 times the performance of MySQL and 1/10 the storage cost, X-DB combines software with hardware to make full use of the most cutting-edge technical advantages in both software and hardware fields.

FPGA acceleration is our first attempt in the custom computing field. At present, the FPGA-accelerated X-DB has been subject to small-scale online grayscale release. FPGA will assist X-DB in the 6.18 and Double 11 shopping carnivals this year and will meet Alibaba's business departments' high database performance requirements.

Overview of Alibaba's X-Engine

Owning the world's largest online transaction website, Alibaba's OLTP (online transaction processing) database system needs to satisfy high-throughput service requirements. According to our statistics, several billion records get written into our OLTP database system on a daily basis. During the 2017 Double 11 (Singles' Day) shopping carnival, the system's peak throughput reached 10 million TPS (transactions per second). Alibaba's business database systems mainly have the following characteristics:

  • High transaction throughput and low latency in write and read operations.
  • Write operations make up a relatively high proportion in comparison to that of traditional databases; the read to write workload ratio usually is more than 10:1. However, the number for Alibaba's transaction system reached 3:1 on the day of the 2017 Double 11 shopping carnival.
  • Data access hotspots are relatively concentrated. A newly written data record will be accessed mainly (99%) within the first seven days, and the possibility it may be accessed later is extremely low.
  • To meet Alibaba's stringent requirements on performance and cost, we have designed a new storage engine; it is called X-Engine. We have used many cutting edge database technologies in X-Engine; these include highly-efficient memory index structures, asynchronous write assembly-line processing mechanism, and optimistic concurrency control for in-memory databases.

    To achieve the best write performance and facilitate the separation of cold and hot data for tiered storage, X-Engine has borrowed the design of LSM-Tree. X-Engine maintains multiple memtables in its memory. It appends all newly written data to these memtables, rather than directly replacing existing records. As the data storage is relatively large, it is impossible to store all data in memory.

    When data in memory reaches a specified volume, we flush it to the persistent storage to form an SSTable. To reduce latency in read operations, X-Engine regularly schedules compaction tasks to compact SSTables in the persistent storage. X-Engine merges key-value pairs in multiple SSTables by keeping only the latest version of key-value pairs if multiple versions exist (all key-value pair versions currently referenced by transactions will also be kept).

    Based on the characteristics of data access, X-Engine applies tiered storage to persistent data, where we store active data in relatively high data layers, and merge less active data (seldom accessed) with base-layer data and store it in the base-layer. It compresses base-layer data at a high compression rate and migrates it to storage media featuring large capacity but the relatively low price (such as SATA HDDs) to achieve the goal of storing a large quantity of data at a relatively low cost.

    In this case, tiered storage creates a new problem: the system must frequently compact data, and the larger number of data writes requires more frequent compaction processes. Compaction is a compare and merge process which requires high consumption of CPU and storage I/O. In high-throughput write cases, a large number of compaction operations will occupy a large number of system resources. This can surely cause the performance of the entire system to drop tremendously thus leading to a huge impact on the application system.

    The completely new X-Engine has extraordinary multi-core expansion capability to achieve very high performance. Its front-end transaction alone can almost completely consume all CPU resources, and it has a much higher resource using efficiency than InnoDB. We have shown the comparison between the two in the following figure:

    Image title

    At such a performance level, the system does not have any other resources for compaction operations; otherwise, performance levels will drop.

    Based on our testing results, in DbBench benchmark's write-only scenario, the system periodically suffers from performance jitter. When a compaction task occurs, the system performance drops by more than 40%, and when the compaction task ends, the system performance returns to normal. We have shown this behavior in the following figure:

    Image title

    However, if we do not conduct compaction promptly, the accumulation of multi-version data can seriously affect the read operations.

    To solve the performance jitter caused by compaction, academic experts have put forward many structures such as VT-tree, bLSM, PE, PCP, and dCompaction. Although these algorithms can optimize the compaction performance across multiple aspects, they cannot reduce consumption of CPU resources by compaction. Based on relevant research statistics, when using SSD storage devices, the computing operations of compaction in the system consumes approximately 60% of computing resources. Therefore, no matter what optimizations we implement for compaction in the software layer, for all LSM tree-based storage engines, performance jitter caused by compaction is always an Achilles' heel.

    Fortunately, special hardware opens a new door for solving performance jitter caused by compaction. In fact, it has become a trend to use special hardware in solving traditional databases' performance bottlenecks. We have already offloaded database operations such as Select and Where to FPGA, and more complex operations such as Group By are under research. However, the current FPGA acceleration solutions have a couple of drawbacks:

  • The current acceleration solutions are designed for the SQL layer; FPGA is generally placed between storage and host and is used as a filter. Although, researchers have made numerous attempts to use FPGA to accelerate the OLAP system, the FPGA acceleration design for the OLAP system remains a challenge.
  • While FPGA's chip size is getting smaller and smaller, FPGA's internal errors such as single event upset (SEU) pose greater and greater threats to FPGA reliability. For a single chip, the probability of internal error is 3-5 years. Therefore, the fault tolerance mechanism design becomes vitally important for systems in need of large-scale availability.
  • To ease the impact of compaction on X-Engine's system performance, we have used an asynchronous hardware device FPGA, rather than the CPU to complete the compaction operation. This approach is crucial for a storage engine that satisfies stringent service requirements by maintaining the overall system performance at a high-level and avoiding performance jitters. Here are the major design features:

  • Highly efficient design and implementation of FPGA compaction: Using streamlined compaction operations, FPGA compaction achieves a processing performance 10 times the CPU single-thread processing performance
  • Hybrid storage engine's asynchronous scheduling logic design: As FPGA can complete compaction's link requests in milliseconds, using a traditional synchronous scheduling method will block a large number of compaction threads and cause heavy thread-switching cost. Through asynchronous scheduling, we have successfully reduced the thread-switching cost and improved the system's engineering availability.
  • Fault tolerance mechanism design: As limits of entered data and FPGA internal errors may cause a rollback of some compaction tasks, to ensure data integrity, all tasks that have been rolled back by FPGA will be re-executed by the equivalent CPU compaction threads. The fault tolerance mechanism design as described in this article meets Alibaba's actual business requirements and avoids FPGA's internal instability.
  • X-Engine Compaction

    X-Engine's storage structure contains one or multiple memory buffer areas (memtable), and multilayer persistent storage L0, L1... Each layer contains multiple SSTables.

    Image title

    When memtable is full, it turns into an immutable memtable and then flushes to an SSTable to L0. Each SSTable contains multiple data blocks and one index block to index the data block. When it reaches the maximum number of L0 files, it triggers the merge of SSTables that have the overlapped key ranges; this process is called compaction. Likewise, when we reach the maximum number of SSTables at a layer, it merges with lower layer data. In this way, cold data constantly flows downward while hot data remains at a relatively higher layer.

    We can specify a range of key-value pairs that merge during a compaction process and this range may contain multiple data blocks. Generally, a compaction process involves merging data blocks between two adjacent layers. However, we need to pay special attention to compaction tasks between L0 and L1. This is because as SSTables in L0 directly flushes from the memory, keys of SSTables in this layer may get overlapped. Therefore, a compaction task between L0 and L1 may involve merging multiple data blocks.

    Image title

    For read operations, X-Engine needs to search for the required data from all memtables. If it fails to find the data in memtables, it searches in the persistence storage, from higher to lower layers. As a result, timely compaction operations not only shorten the read path but also save the storage space. However, this method uses a lot of system computing resources and causes performance jitter. This is an urgent problem that X-Engine must solve.

    FPGA Accelerated Database

    From the perspective of the existing FPGA accelerated databases' status quo, we can divide FPGA accelerated database architectures into two types; the bump-in-the-wire design and the hybrid design. In the early stage, because of the FPGA card's insufficient memory resources, the former type of architecture is relatively popular. In this architecture, we place FPGA on the storage data path and use the host as a filter. The advantage is that it requires zero data replication, while the drawback is that the acceleration operation must be a part of the streamlined process, therefore making it not flexible enough in terms of the design method.

    The latter architecture design uses FPGA as a coprocessor, where we have connected FPGA to host via PCIe and use the DMA method for data transmission. As long as the offloading computation is intensive enough, data transmission costs are acceptable. The hybrid architecture design allows more flexible offloading methods. For complex operations such as compaction, data transmission between FPGA and host is necessary. Therefore, we have used the hybrid architecture design for hardware acceleration in our X-Engine.

    Image title

    System Design

    In traditional LSM-tree-based storage engines, CPU is responsible for handling normal user requests, as well as the scheduling and execution of compaction tasks. In other words, CPU is both the producer and consumer of compaction tasks. However, in a CPU-FPGA hybrid storage engine, CPU is only responsible for producing and scheduling compaction tasks. In this method, we need to offload the execution of compaction tasks to the special hardware (FPGA).

    Image title

    For X-Engine, handling of normal user requests is similar to that of LSM-tree-based storage engines:

  • A user submits a request to operate on a specified KV pair (Get/Insert/Update/Delete). In the case of a write operation, a new record appends to a memtable.
  • When a memtable reaches its maximum size, it turns into an immutable memtable.
  • The immutable memtable then turns into an SSTable and flushes to the persistent storage.
  • When L0 reaches the maximum number of SSTables, compaction gets triggered. We can divide offloading of a compaction task into the following steps:

  • CPU splits Load SSTables (that need to be compacted from the persistent storage) into multiple compaction tasks at the granularity of data blocks following the metadata, and pre-allocates memory space for computation result of each compaction task. Consequently, it pushes each successfully created compaction task into the Task Queue for FPGA to execute.
  • CPU reads the status of Compaction Units on FPGA and allocates compaction tasks from the Task Queue to available Compaction Units.
  • It transmits Input data to FPGA's DDR via DMA.
  • A Compaction Unit executes the compaction task and transmits the computation result via DMA back to the host; it attaches a return code to indicate the status of this compaction task (fail or success). Next, it pushes the compaction results of finished tasks to the Finished Queue.
  • The CPU checks the compaction result status in the Finished Queue. If a compaction task fails, the CPU executes it again.
  • It flushes the compaction results to storage.
  • Detailed Design FPGA-Based Compaction

    Compaction Units (CU) are the basic unit for FPGA to execute compaction tasks. An FPGA card can place multiple CUs, and each CU is composed of the following modules:

    Image title

    1. Decoder: In X-Engine, we store a KV in the data block after compression and encoding. The primary function of the Decoder module is to decode KV pairs. Each CU contains 4 Decoders, and a CU support a compression task of a maximum of 4 KV pairs. We need to split the compression tasks that require compression of more than 4 KV by the CPU. Based on our assessment, most compression tasks involve less than 4 KV pairs. We have placed 4 Decoders based on our considerations of performance and hardware resources. Comparing the configuration with 2 Decoders, we've increased 100% hardware consumption but obtained 300% performance improvement.

  • KV Ring Buffer: KV pairs decoded by the Decoder module get temporarily stored in KV Ring Buffer. Each KV Ring Buffer maintains a read indicator (maintained by the Controller module) and a write indicator (maintained by the Decoder module). KV Ring Buffer maintains three signals to indicate the current status: FLAG_EMPTY, FLAG_HALF_FULL, and FLAG_FULL. If FLAG_HALF_FULL is at a low level, the Decoder module will continue decoding KV pairs. Conversely, the Decoder module will stop decoding KV pairs until downstream consumers in the pipeline have consumed the decoded KV pairs.
  • KV Transfer: This module is responsible for transmitting keys to Key Buffer. Because merging KV pairs only involve comparison of key values, the values do not need to be transmitted. We can track the currently compared KV pairs by using the read indicator.
  • Key Buffer: This module stores keys of each KV pair that need to be compared. When all keys that need to be compared have been transmitted to the Key Buffer, the Controller notifies the Compaction PE to compare them.
  • Compaction PE: The Compaction Processing Engine (compaction PE) is responsible for comparing key values in Key Buffer. Comparison results are sent to the Controller, and then the Controller sends a notice to KV Transfer to transmit the corresponding KV pair to the Encoding KV Ring Buffer for the Encoder module to encode them.
  • Encoder: The Encoder module is responsible for encoding KV pairs from the Encoding KV Ring Buffer into a data block. If the data block reaches its maximum size, then the current data block gets flushed to DDR.
  • Controller: The Controller acts as a coordinator in CU. Although the Controller is not a part of the compaction pipeline, it plays a key role in each step of the compaction pipeline design.
  • A compaction process contains three key steps: decoding, merging, and encoding. The most significant challenge for designing a proper compaction pipeline is that the execution time for each step varies significantly. For example, because of parallel processing, the throughput of the decoder module is much higher than the encoder module. Therefore, we must suspend some fast modules to wait for downstream modules still in the pipeline. To match the throughput differences in each of the pipeline's modules, we have designed a Controller module to coordinate different steps in the pipeline. An additional benefit of this design is that it decouples each module in the pipeline and enables more flexible development and maintenance during engineering implementation.

    Image title

    When integrating FPGA compaction into X-Engine we hope to have independent CU throughput performance; the baseline of the experiment is the CPU.

    Single-core compaction thread (Intel(R) Xeon(R) E5-2682 v4 CPU with 2.5 GHz)

    Image title

    We can draw the following three conclusions from the experiment:

  • n all KV lengths, FPGA compaction has a higher throughput than that of a single-thread CPU; this proves the feasibility of compaction offload;
  • With the increase of KV lengths, FPGA compaction throughput reduces. This is because the lengths of bytes that need to be compared have increased, resulting in the increase of cost for comparison.
  • The acceleration rate (FPGA throughput / CPU throughput) increases with the value length. This is because when the KV length is short, it requires frequent communication and status checking among different modules; this means a relatively high cost in comparison with normal pipeline operations.
  • Asynchronous Scheduling Logic Design

    Because a link request in FPGA is completed in milliseconds, using the traditional synchronous scheduling method will cause high thread switching costs. Based on FPGA's characteristics, we have redesigned an asynchronous scheduling compaction method, where:

  • The CPU is responsible for building compaction tasks and pushing them into the Task Queue.
  • A thread pool is maintained to distribute compaction tasks to specified CUs.
  • When a compaction task is finished, it will be pushed to the Finished Queue.
  • The CPU will then check the task execution status, and schedule CPU compaction threads to re-execute the failed compaction tasks.
  • Asynchronous scheduling significantly reduces the thread-switching cost of CPU.

    Image title

    Fault Tolerance Mechanism Design

    For FPGA compaction, the following three reasons can lead to the failure of compaction task:

  • Data gets damaged during the transmission process: Calculate the CRC values of data before and after transmission, and compare the values. If these two CRC values are inconsistent, it means that the data is damaged.
  • FPGA internal errors (bit upset): To solve this problem, we have attached an additional CU to each CU. We can compare the computation results of both CUs and any inconsistency in the results will indicate that a bit upset error has occurred.
  • Input data of a compaction task is invalid: To facilitate FPGA compaction design, we have set a restriction on the length of KVs. The compaction tasks for KVs that exceed the maximum allowable length are identified as invalid tasks.
  • To ensure the data is correct, the CPU will conduct computation again on all failed tasks. As we mentioned earlier in the fault tolerance mechanism, we have addressed a small part of compaction tasks that exceed the limits and have avoided the risk of FPGA internal errors.

    Image title

    Experiment Results Lab environment
  • CPU: 64-core Intel (E5-2682 v4, 2.50 GHz) processor
  • Memory: 128 GB
  • FPGA card: Xilinix VU9P
  • memtable: 40 GB
  • block cache 40 GB
  • We compared the performance of two storage engines:

  • X-Engine-CPU: compaction operation executed by CPU
  • X-Engine-FPGA: compaction offloaded to FPGA for execution
  • DbBench

    Image title

    Result analysis:

  • n a write-only scenario, X-Engine-FPGA sees a 40% throughput increase. From the performance curve we can tell that when compaction begins, the performance of X-Engine-CPU drops by 1/3.
  • FPGA compaction has a higher throughput and is faster, so the read path is shortened faster. Therefore, in the read/write hybrid scenario, X-Engine-FPGA throughput increases by 50%.
  • The throughput in the read/write hybrid scenario is smaller than that of the write-only scenario. Read operations require access to data stored in persistent layers which brings in I/O cost and affects the overall throughput performance.
  • These two performance curves represent two different compaction statuses. In the left figure, the system performance jitters periodically meaning that the compaction operation is competing with normal transaction handling threads for CPU resources; while in the right figure, X-Engine-CPU's performance maintains at a low-level meaning that the compaction speed is smaller than the write speed, causing accumulation of SSTables. Compaction tasks are subject to constant scheduling at the backend.
  • CPU schedules the Compaction tasks. That's why X-Engine-FPGA's performance also jitters and the curve is not smooth.
  • YCSB

    Image title

    Result analysis:

  • On YCSB benchmark, due to the influence of compaction, X-Engine-CPU's performance decreases by approximately 80%. However, for X-Engine-FPGA, its performance only sees a fluctuation of 20% due to the influence of the compaction scheduling logic.
  • The check-unique logic introduces read operations. With the increase in pressure testing time, the read path becomes longer, and the performance of both storage engines decreases with time.
  • In the write-only scenario, X-Engine-FPGA's throughput increases by 40%. However, with the increase in the read/write ratio, the acceleration effect of FPGA Compaction decreases gradually. When the read/write ratio becomes higher, the write pressure becomes smaller, and the SSTable accumulation becomes slower thus reducing the number of threads that handle compaction tasks. Therefore, X-Engine-FPGA sees a more obvious performance increase in write-intensive workloads.
  • With the increase in the read/write ratio, the throughput increases. When write throughput is smaller than that of the KV interface, the cache miss ratio is relatively low, thus avoiding frequent I/O operations. With the increase in the proportion of write operations, the number of threads that handle compaction tasks also increases, thus reducing the system's throughput capability.
  • Image title

    Result analysis:

  • With FPGA acceleration, X-Engine-FPGA's performance improves by 10%–15% when the number of connections is increased from 128 to 1024. When the number of connections increases, the throughput of both systems gradually decreases because of the lock competition of hotspot rows increases.
  • TPC-C's read/write ratio is 1.8 : 1. In the experiment, under the TPC-C benchmark, more than 80% of CPU resources were consumed on SQL resolution and lock competition of hotspot rows. The actual write pressure was not very heavy. Based on our observation in the experiment, the number of threads that execute compaction tasks in the X-Engine-CPU is no more than three (a total of 64 cores). Therefore, FPGA's acceleration effect is not as obvious as the previous instances.
  • SysBench

    We have included testing for InnoDB in this experiment (buffer size = 80 GB)

    Image title

    Result analysis:

  • X-Engine-FPGA improves more than 40% of throughput performance. Because SQL resolution consumes a large number of CPU resources, the throughput of DBMS is smaller than that of the KV interface.
  • X-Engine-CPU reaches a balance at a low level. Because the compaction speed is slower than the writing speed, SST files are accumulated, and compaction is constantly scheduled.
  • X-Engine-CPU's performance is twice that of InnoDB, which shows the advantage of LSM tree-based storage engines in a write-intensive scenario;
  • In comparison with the TPC-C benchmark, Sysbench is more similar to Alibaba's real transaction scenario. For a transaction system, most queries are data insertion queries and simple point queries and seldom involve range queries. A decrease in hotspot row conflicts causes the number of resources consumed in the SQL layer to decrease. During the experiment, we have observed that for X-Engine-CPU, when more than 15 threads are used to execute compaction tasks, the performance improvement brought by FPGA acceleration is very obvious.
  • Conclusion

    In this article, the X-Engine storage engine accelerated by FPGA brings 50% performance improvement for the KV interface, and 40% performance improvement for the SQL interface. With the decrease in the read/write ratio, FPGA's acceleration effect becomes more obvious, thus meaning that FPGA compaction acceleration is suitable for write-intensive workloads. This is consistent with the intention of the LSM-tree design. Also, we have avoided FPGA's internal defects by designing a fault tolerance mechanism, and we've finally created a high-availability CPU-FPGA hybrid storage engine that meets Alibaba's real service requirements.

    It is the first real project that uses a heterogeneous computing device introduced by X-DB to accelerate core database functions. Based on our experiences, FPGA can completely meet the computing demands raised by X-Engine's compaction tasks. At the same time, we have been researching to schedule more suitable computing tasks to FPGA for execution, such as compression, BloomFilter generation, and SQL JOIN operators. At present, the R&D for the compression function is completed, and it will be built into a set of IP together with Compaction to perform data compaction and compression operations simultaneously.

    X-DB FPGA-Compaction hardware acceleration is an R&D project completed by three parties; these parties are respectively the Alibaba Database Department database kernel team, the Alibaba Server R&D Department custom computing team, and Zhejiang University. Xilinx's technical team has also made great contributions to the success of this project. We hereby extend our gratitude to them. We will post X-DB online for public beta this year. You will then be able to experience the significant performance improvement with FPGA acceleration to X-DB.


    HP EliteBook 8760w Mobile Workstation | killexams.com real questions and Pass4sure dumps

    1 Apr, 2012 By: Art Liddle First Look Review: Nine-pound powerhouse delivers exceptionally fast performance.

    We have been looking forward to getting our hands on an HP EliteBook mobile computer for some time. When the Elitebook 8760w arrived at Cadalyst Labs, we didn’t waste any time installing our software and revving up the engine, so to speak. As you will see, it proved to be well worth the wait.

    System features. HP configured our review unit with the Intel Core i7-2820QM, a quad-core CPU with a clock speed of 2.3 GHz and turbo mode of 3.4 GHz. It arrived loaded with Microsoft Windows 7 Professional 64-bit. A pair of 8-GB DIMMs occupies two of its four memory slots, providing 16 GB of DDR3-1333MHz memory. Filling the two empty slots would double system memory to a whopping 32 GB.

    The system's two internal drive bays house a pair of 320-GB SMART SATA II hard drives, which you can configure as RAID 0 or 1. A third drive bay houses a Blu-ray ROM SuperMulti DVD+-R/RW optical drive with double-layer support. You can exchange this optical drive for a third hard drive, increasing storage space and allowing a RAID 5 configuration. Note that filling all three drive bays with the largest-capacity drives expands the maximum storage space to 2 TB — amazing for a mobile computer.

    Our HP Elitebook 8760w arrived with a 17.3" LED-backlit DreamColor display, which supports one billion colors at a native resolution of 1,920 x 1,080. The optional DreamColor display is ideal for designers, graphic artists, and others who require accurate color fidelity onscreen. An NVIDIA Quadro 5010M GPU (4-GB GDDR5) powers the graphics subsystem. Thanks to its parallel processing architecture and ECC memory, it provides ultimate graphics power and accuracy for this mobile package.

    As for connectivity, the EliteBook 8760w offers a wide choice of options to suit most situations: two USB 3.0 ports, two USB 2.0 ports, one eSATA/USB 2.0 combo port, one IEEE 1394a port, one Ethernet connector, and one RJ-11 modem jack. External graphics options include a VGA port and DisplayPort. Stereo microphone in and stereo headphone out jacks round out the external connections.

    Test scores. What about performance? We ran our standard suite of three tests: Cadalyst c2011 v5.3b benchmark with AutoCAD 2011 and its default driver; Cadalyst c2011 with AutoCAD 2011 and NVIDIA’s enhanced driver; and SPECviewperf 11. (Although Cadalyst c2012 is now available, we opted to run c2011 to enable apples-to-apples comparisons with the previous model, and we continue to run AutoCAD 2011 while we await NVIDIA’s update of its enhanced driver for AutoCAD 2012.) We set the screen resolution to 1,280 x 1,024 and the color depth to 32-bit, enabled hardware acceleration for AutoCAD, and turned off vertical sync for the graphics card.

    Once the dust settled and we had a chance to view the results, we were astounded. The Cadalyst c2011 total index score with the NVIDIA NVGL10.hdi driver was 50% faster than any mobile computer previously reviewed by Cadalyst Labs. The total index even beat the fastest desktop workstation we have ever tested by 25%. The full set of benchmark scores were: total index of 1,530; 3D graphics index of 5,361; 2D graphics index of 326; disk index of 188; and CPU index of 245.

    The weighted scores for the SPECviewperf 11 suite of tests, single sample mode only, were as follows: 46.05 for catia-03, 41.93 for ensight-04, 54.04 for lightwave-01, 85.33 for maya- 03, 9.61 for proe-05, 50.30 for sw-02, 44.88 for tcvis-02, and 42.97 for snx-01. These scores are also excellent. In fact, three represent Cadalyst Labs top scores by a wide margin compared with the next closest competitor (desktop or laptop): ensight-04 (30% faster), snx-01 (29%), and tcvis-02 (23%).

    For the record, the c2011 benchmark scores using the default AutoCAD 2011 driver were: total index of 396, 3D graphics index of 898, 2D graphics index of 251, disk index of 185, and CPU index of 250. The cooling fan of the EliteBook 8760w operated at full throttle during portions of the testing. The fan kept temperatures down, but the noise was distracting.

    Battery performance. The EliteBook 8760w’s external power brick measures 77/8" x 37/8" x 1". Our review unit included a standard 8-cell (83WHr) lithium-ion battery.

    We used the Battery Rundown Test option included with the Cadalyst c2012 benchmark to see how the EliteBook 8760w handles life off the power grid. We ran the test four times and found the battery lasts an average of 100 minutes under maximum operating conditions. The battery lasted an average of 2 hours, 50 minutes in idle mode, with default power settings and no applications running. What about charging the battery? Our testing showed the battery reaches 98% capacity in 100 minutes. These times are only guidelines; performance will decrease after repeated battery discharge cycles.

    The 17.3" HP EliteBook 8760w has a full-sized, backlit keyboard that includes a dedicated numeric keypad, touchpad, and pointing stick.

    Extras. The EliteBook 8760w is not just fast, it is rugged. Its hybrid magnesium-aluminum metal case is designed to provide maximum protection for the internal equipment — it even meets the MIL-STD-810G military standards for environmental conditions, including temperature, altitude, humidity, dust, and vibration. The case measures 16¹/8" x 10½" x 17/8" and weighs 9 lbs — typical for a powerful 17.3" mobile computer.

    HP is known for including powerful tools and extra features with its products, and the EliteBook 8760w is no exception. The HP SoftPaq Download Manager provides a single interface to manage and download software updates for all system components. The HP Power Assistant lets you fine-tune power-management settings; using dedicated circuits on the motherboard, it provides real-time data on battery use and displays current power consumption in watts. You can customize your power use based on the time of day or day of the week.

    The EliteBook 8760w includes a limited three-year onsite warranty; the battery is covered for one year. Extended warranty plans are available. HP offers round-the-clock e-mail and online technical support during the life of your warranty.

    In closing. The HP EliteBook 8760w is the most powerful mobile workstation to pass through the doors of Cadalyst Labs. Of course, you'll pay a price for this much power, but it's not as expensive as you might think. As configured for this review, this model costs $5,003. Anyone looking for high-end CAD workstation performance in a mobile form factor should check out the HP EliteBook 8760w. Highly Recommended.

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